Research

Hardware Accelerators for Statistical Inference for Machine Learning

Group Researchers: Abner Guzmán-Rivera, Jungwook Choi, Shang-nien Tsai, Glenn Ko, Adel Ejjeh

Collaborators: Naresh Shanbhag, Illinois;  Paris Smaragdis, Illinois

Machine learning (ML) technologies have revolutionized the ways in which we interact with large-scale, imperfect, real-world data.  We can cast these as high-dimensional optimizations; we can manage the inherent uncertainties via the mechanics of probability; and we can search for answers to complex questions across a range of vital applications. What we cannot do is solve these problems quickly and efficiently, or in low-power form-factors.
We are working to render in hardware one broad class of ML techniques:  Statistical Inference on Probabilistic Graphical Models (PGMs).  In these graphs, labels on nodes encode what we know and “how much” we believe it;  edges encode belief relationships among labels;  statistical inference answers questions such as “if we observe some of the labels in the graph, what are most likely labels on the remainder?”  These problems are interesting because they can be very large (e.g., every pixel in an image is one graph node) and because we need answers very fast (e.g., at video frame rates).  We have demonstrated that inference done as iterative Belief Propagation (BP) can be very efficiently implemented in hardware, and demonstrate several examples from current FPGA prototypes. We have demonstrated  the first configurable, scalable parallel architecture capable of running a range of standard computer vision benchmarks, with large speedups over conventional software. BP hardware can also be made remarkably tolerant to the low-level statistical upsets expected in end-of-Moore’s-Law nanoscale silicon and post-silicon circuit fabrics, and our novel resilience mechanisms also show opportunities for significant power savings.  Current work is focusing on sampling-based architectures for inference, and graph-cuts based architectures for inference, again using both FPGAs and virtual silicon prototypes.

Key Papers/Talks

  • Jungwook Choi and Rob A. Rutenbar, “Hardware Implementation of MRF MAP Inference on an FPGA Platform,”   Proc. 22nd Intl Conference on Field Programmable Logic and Applications (FPL), August 2012.
    Minje Kim, Paris Smaragdis, Glenn G. Ko and Rob A. Rutenbar, “Stereophonic Spectrogram Segmentation Using Markov Random Fields,” Proc. 2012 IEEE Int’l Workshop on Machine Learning for Signal Processing, Sept. 2012z
  •  Jungwook Choi and Rob A. Rutenbar, “Video-Rate Stereo Matching Using Markov Random Field TRW-S Inference on a Hybrid CPU+FPGA Computing Platform,” in Proc. ACM Int’l Symposium on FPGAs (ISFPGA), February 2013.
  • Chuanjun Zhang, Glenn G. Ko, Jungwook Choi, Shang-nien Tsai, Minje Kim, Abner Guzman-Rivera, Rob A. Rutenbar, Paris Smaragdis, Mi Sun Park, Vijaykrishnan Narayanan, Hongyi Xin, Onur Mutlu, Bin Li, Li Zhao and Mei Chen. “EMERALD: Characterization of emerging applications and algorithms for low-power devices,” Proc. IEEE Int’l Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
  • Jungwook Choi, Erik Kim, Rob A. Rutenbar, Naresh Shanbhag,  “Error Resilient MRF Message Passing Architecture for Stereo Matching”, in Proc. 2013 IEEE Workshop on Signal Processing Systems, October 2013.  (Best Student Paper Award.)
  • Jungwook Choi and Rob. A. Rutenbar, “FPGA Acceleration of Markov Random Field TRW-S Inference for Stereo Matching”, in Proc. 2013 Eleventh IEEE/ACM Int’l Confefence Formal Methods and Models for Codesign (MEMOCODE), October 2013.  (MEMOCODE’13 Design Contest Winner.)
  •  Eric P. Kim, Jungwook Choi, Naresh R. Shanbhag, and Rob A. Rutenbar, “A Robust Message Passing Based Stereo Matching Kernel via System-Level Error Resiliency,” in IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Apr. 2014.
  • Abner Guzman-Rivera, Pushmeet Kohli, Dhruv Batra and Rob A. Rutenbar. “Efficiently Enforcing Diversity in Multi-Output Structured Prediction,” Proc. of Int’l Conference on Artificial Intelligence and Statistics (AISTATS), 2014.
  • Jungwook Choi and Rob A. Rutenbar, “Video-Rate Stereo Matching Using Markov Random Field TRW-S Inference on a Hybrid CPU+FPGA Computing Platform,” IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), vol. 26, no. 2, February 2016.
  • Eric P. Kim, Jungwook Choi, Naresh R. Shanbhag, and Rob A. Rutenbar, “Error Resilient and Energy Efficient MRF Message Passing Based Stereo Matching,” IEEE Transactions on VLSI Systems (TVLSI), Vol. 24, No. 3, March 2016.
  • Skand Hurkat, Jungwook Choi, Eriko Nurvitadhi, Jose F. Martinez, Rob A. Rutenbar, “A Fast Hierarchical Implementation of Sequential Tree reweighted Belief Propagation for Probabilistic Inference,”  in Proc. 25th International Conference on Field Programmable Logic and Applications (FPL’15) London, England, Sept. 2015.
  •  J. Choi, A. D. Patil, R.A. Rutenbar, N. R. Shanbhag, “Analysis Of Error Resiliency Of Belief Propagation In Computer Vision,” IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), April 2016.
  • J. Choi and R.A. Rutenbar, “Configurable and Scalable Belief Propagation Accelerator for Computer Vision,” Int’l Conference on Field Programmable Logic and Applications (FPL’16), September 2016.
  • Glenn Ko and Rob A. Rutenbar, “A Case Study of Machine Learning Hardware: Real-Time Source Separation using Markov Random Fields via Sampling-based Inference”, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), April 2017.

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